Introduction
 
With the slowing down of Moore’s Law [1], there has been a growing interest in domain-specific hardware and architectures to address emerging computational challenges and energy efficiency, particularly borne out of machine learning and AI applications. One promising approach is the co-integration of traditional complementary metal oxide semiconductor (CMOS) technology with emerging nanotechnologies (X), resulting in CMOS + X architectures. the primary objective of this approach is to augment existing CMOS technology with novel functionalities, enabling the development of energy-efficient hardware systems that can be applied to a wide range of problems across various domains. By blending CMOS with alternative materials and devices, CMOS + X architectures can enhance traditional CMOS technologies in terms of energy efficiency and performance Being named one of the top 10 algorithms of the 20th century [2], Monte Carlo methods have been one of the most ∗ ‘ese authors contributed equally effective approaches in computing to solve computationally hard problems in a wide range of applications, from probabilistic machine learning, optimization to quantum simulation. Probabilistic computing with p-bits [3] has emerged as a powerful platform for executing these Monte Carlo algorithms in massively parallel [4, 5] and energy-efficient architectures. p-bits have been shown to be applicable to a large domain of computational problems from combinatorial optimization to probabilistic machine learning and quantum simulation [6–8]. Several p-bit implementations that use the inherent stochasticity in different materials and devices have been proposed, based on di‚usive memristors [9], resistive RAM [10], perovskite nickelates [11], ferroelectric transistors [12], single photon avalanche diodes [13], optical parametric oscillators [14] and others. Among alternatives sMTJs built out of low-barrier nanomagnets have demonstrated significant potential due to their ability to amplify noise, converting millivolts of fluctuations to hundreds of millivolts over resistive networks [15], unlike alternative approaches with amplifiers [16]. Another advantage of sMTJ-based pits is the continuous generation of truly random bitstreams without the need to be reset in synchronous pulse-based designs [17, 18]. The possibility of designing energy-efficient p-bits using low-barrier nanomagnets has
 
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