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csx-home>vol-01>issue-01>CMOS + stochastic nanomagnets: heterogeneous computers for probabilistic inference and learning
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Submitted 16 March 2023
Revised 10 April 2023
Accepted 17 April 2023
CMOS + stochastic nanomagnets: heterogeneous computers for probabilistic inference and
learning
Keito Kobayashi
Nihal Singh
Qixuan Cao
Kemal Selcuk
1 Tianrui Hu,1 Shaila Niazi,1 Navid Anjum
Aadit,1 Shun Kanai,2, 3, 4, 5, 6, 7, 8 Hideo Ohno,2, 4, 5, 9 Shunsuke Fukami,2, 3, 4, 5, 9, 10, †
and Kerem Y. Camsari1, ‡
Canadian Science Letters X
2023 ° 21(04) ° 01-01
https://www.wikipt.org/csx-home
DOI: 10.1490/6576987.621csx
Funding Agent Details
Not Applicable.
Abstract
Extending Moore’s law by augmenting complementary-metal-oxide
semiconductor (CMOS) transistors with emerging nanotechnologies (X) has become increasingly important. Accelerating Monte Carlo algorithms that rely on random sampling with such CMOS+X technologies could have signicant impact on a large number of elds from probabilistic machine learning, optimization to quantum simulation. In this paper, we show the combination of stochastic magnetic tunnel junction (sMTJ)-based probabilistic bits (p-bits) with versatile Field Programmable Gate Arrays (FPGA) to design a CMOS + X (X = sMTJ) prototype. Our approach enables high-quality true randomness that is essential for Monte Carlo based probabilistic sampling and learning. Our heterogeneous computer successfully performs probabilistic inference and asynchronous Boltzmann learning, despite device-to-device variations in sMTJs. A comprehensive comparison using a CMOS predictive process design kit (PDK) reveals that compact sMTJ-based p-bits replace 10,000 transistors while dissipating two orders of magnitude of less energy (2 fJ per random bit), compared to digital CMOS p-bits. Scaled and integrated versions of our CMOS + stochastic nanomagnet approach can signicantly advance probabilistic computing and its applications in various domains by providing massively parallel and truly random numbers with extremely high throughput and energy-eciency.
Introduction
With the slowing down of Moore’s Law [1], there has been a growing interest in domain-specific hardware and architectures to address emerging computational challenges and energy-efficiency, particularly borne out of machine learning and AI applications. One promising approach is the co-integration of traditional complementary metaloxide semiconductor (CMOS) technology with emerging nanotechnologies (X), resulting in CMOS + X architectures. the primary objective of this approach is to augment existing CMOS technology with novel functionalities, enabling the development of energy-ecient hardware systems that can be applied to a wide range of problems across various domains. By blending CMOS with alternative materials and devices, CMOS + X architectures can enhance traditional CMOS technologies in terms of energy-efficiency and performance Being named one of the top 10 algorithms of the 20th century [2], Monte Carlo methods have been one of the most ∗ ese authors contributed equally effective approaches in computing to solve computationally hard problems in a wide range of applications, from probabilistic machine learning, optimization to quantum simulation. Probabilistic computing with p-bits [3] has emerged as a powerful platform for executing these Monte Carlo algorithms in massively parallel [4, 5] and energy efficient architectures. p-bits have been shown to be applicable to a large domain of computational problems from combinatorial optimization to probabilistic machine learning and quantum simulation [6–8]. Several p-bit implementations that use the inherent stochasticity in different materials and devices have been proposed, based on diusive memristors [9], resistive RAM [10], perovskite nickelates [11], ferroelectric transistors [12], single photon avalanche diodes [13], optical parametric oscillators [14] and others. Among alternatives sMTJs built out of low-barrier nanomagnets have demonstrated signicant potential due to their ability to amplify noise, converting millivolts of uctuations to hundreds of millivolts over resistive networks [15], unlike alternative approaches with amplifiers [16]. Another advantage of sMTJ-based pbits is the continuous generation of truly random bitstreams without the need to be reset in synchronous pulsebased designs [17, 18]. The possibility of designing energy-efficient p-bits using low-barrier nanomagnets has ...............Read more by purchasing the full lenghth.
Conclusion
This work demonstrates the first hardware demonstration of a heterogeneous computer combining versatile FPGAs with stochastic MTJs for probabilistic machine learning and inference. We introduce a new variation tolerant pbit circuit that is used to create an asynchronous clock domain, driving digital p-bits in the FPGA. In the process, the CMOS + sMTJ computer shows how commonly used and inexpensive PRNGs can be augmented by magnetic nanodevices to perform as well as high quality PRNGs, both in probabilistic inference and learning experiments. Our CMOS + sMTJ computer also shows the first demonstration of training a deep Boltzmann network in a 32-node Chimera topology, leveraging the asynchronous dynamics of sMTJs. Careful comparisons with existing digital circuits show the true potential of integrated sMTJs which can be scaled up to million p-bit densities far beyond the capabilities of present day CMOS technology.
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